AFM makes X3 go. SanDisk’s X3 expertise is reeling in the Mobile OEM wins. If SanDisk can deliver an X3 SSD, all past SSD sins will be forgiven.
X3 is 3 bits per cell NAND. MLC (X2) is 2 bits per cell NAND. SLC (X1) is 1 bit per cell NAND. More bits per cell means lower costs, but also lower performance and reliability.
No free lunch.
The most important twist is that not all X3 is created equal. SanDisk seems to have figured out how to deliver an X3 solution satisfying customer requirements, where others haven’t.
How is SanDisk delivering where other’s are falling short? The answer is twofold: AFM and SanDisk’s X3 chip design.
Adaptive Flash Management (AFM)
The slide below illustrates how AFM can bridge the gap between raw the performance of the raw 32nm X3 NAND memory (light blue five-pointed polygon) and the requirements of the application target specs (the five-pointed red line polygon).
SanDisk has coined three terms to describe the rough outlines of how AFM works: Smart Caching, SLC Emulation, and High Performance Mode.
SanDisk’s AFM uses Smart Caching to improve the performance of Random R/W and improve endurance.
Smart Caching is creating an area within the flash “which is like a sketch pad for the user. The user meaning the handset- the OS, the chip set. Being able to use that as an area that is constantly using [being used for] small quantities of data, fast moving data that you constantly need to use.”
To improve Data Retention SanDisk’s AFM uses SLC Emulation: “But if you consider the flash and you take a small portion for the code- which at the end of the day, out of the whole capacity is a very small part- if you take that capacity and allocate to it a small quantity and you consider [configure] it to work as similar to an SLC mode, then you’ve got the reliability that you need. There is no issue. There is no reason to add another component, which would be the SLC or even NOR- if you go even further back. You save the cost of that component. Therefore you have a much more competitive solution.”
To improve the performance of Sequential Write SanDisk’s AFM uses a High Performance Mode: “ Working with the system. Understanding the environment that we are in. Not being just a dumb memory device. Understanding the environment that we are in and having a dialog with the chip set or with the OS or the application. Having that dialog allows us to do a lot of things that before we could not.
SanDisk’s X3 chip design
While AFM is a big deal, it’s not the whole X3 story.
To my mind, SanDisk would be well served to make more of its X3 chip design. Pretty clever stuff.
The key to the chip is its ALL Bit Line (ABL) architecture which uses double column logic, allowing simultaneous access of two word lines.
ABL provides an energy efficient system. Its fast with improved reliability. And its patented. SanDisk claims that its X3 approaches the write speeds of other’s MLC.
The slide below, from ISSCC 2008, gives a sense of what ABL can achieve, even though it doesn’t include X3.
Sanjay’s X3 Investor Day 2010 Presentation
Sanjay Mehrotra, SanDisk’s President & Chief Operating Officer, spent significant time in this year’s Investor Day talking about X3. He covered a lot of ground including the value of X3, the difficulties of deploying X3 in volume, SanDisk’s utilization of X3, SanDisk’s Roadmap, SanDisk’s Cost Reduction, and Cost Reduction Outlook.
I have decided to let Sanjay speak for himself:
“Of course X3 is extremely valuable. Let me share with you why so. For 32nm if you look at the die size, of our 32 Gbit memory with X2 is about 140mm squared. If you look at the die size of our X3 memory at the same technology node, 32nm and the same capacity, 32Gbit, the die size is 113mm squared. Obviously this translates to approximately 20% more GB per wafer.
That leads to substantially lower costs [missed words] it does not require any additional capital expense over the production of X2 memory. And no additional process complexity to produce the X3 memory.
On top of that SanDisk’s system expertise is able to leverage X3 in the product meeting the specs, specifications, that are delivered by others, in similar products using X2. So clearly we can price our products that use X3 at levels similar to the products that are supplied by competitors with X2.
So essentially the pricing is alike between our X3 products and competitor’s X2 products. So this leads to the obvious gross margin expansion for SanDisk due to being able to maintain pricing with the ability to reduce costs and provide the highest ROI on our flash memory production.
X3 is extremely valuable, if you are really able to deploy it in large volumes. So for Q4 2009, I’m showing you here Gartner’s projections of X3 bit production by various suppliers. So you can see here that SanDisk has a significant lead over others.
In fact Toshiba our R&D partner as I told you , but in the fab output [??] of X3 we have significantly over them as well. And the rest of the players for X3 production output in 2009 Q4 timeframe are extremely small.
Again I want to point out that its not only about designing the X3 memory. It is the system that goes with that X3 memory with all the algorithms to manage the performance, to manage the reliability, to ultimately make it a product that meets the specifications that the market requires…
SanDisk has applied X3 across all of our end markets. Of course across all our products addressing our major end markets. So in terms of Mobile for Q4 2009, approximately 50% of our bits came from X3. In terms of Imaging also approximately 50% and in USB drives approaching 85 to 90% range.
There are certain products, such as lower capacity products, some embedded products, as well as products like SSDs and high performance cards such as Extreme cards, the highest performance cards that do not yet utilize [X3] because of the requirements of those applications.
So we have really optimally applied X3 as aggressively as we can across our multiple product platforms. We have started to apply X3 in our embedded products as well, some of the embedded products, such as some iNAND products.
On our technology roadmap you see that X3 is an integral part of each technology generation. Moving from 32nm, ramping it up, into production with X2 and X3 and continuing to drive aggressively utilization [??] of X3 to 24nm coming on production in late 2010 in Q4, the timeframe.
And of course we have X3 in the 24nm transition as well. And then we are working on the 1x flash memory and that is targeted at this time for production some time in the second half of 2012…
2008 was 56nm technology as the workhorse. 2009 was 43nm. More than 50% came from technology transitions of the memory cost reductions and approximately 20% came from transitions to X3 and X4 memory in 2009 compared to 2008.
In 2008 if you recall our X3 and X4 utilization for the year was around 10% of the bits. In 2009 X3 and X4 utilization was approximately 50%. So that is how the rate of utilization drives costs lower and contributed about 20% of the memory cost reduction.
Looking ahead at 2010, we expect the cost/GB reduction to be in the range of 30 to 40%. X3 contribution, production output, is expected to be greater than 50%. And the key driver of cost reduction in 2010 will be the 32nm transition.
We expect the 32nm transition as we are ramping up during the course of this year and expect to achieve complete transition to 32nm by the end of the year. We expect that transition to yield us about 70% of our total bit production in the year coming from 32nm. So that will be a driver for cost reduction during 2010 and of course continuing to drive lower non-memory [missed word- average??] costs as well…”
Lots of good stuff in Sanjay’s X3 presentation, and I’m tempted to add commentary. This post is long enough as it is. One note though.
The one slide that jumps out is the NAND Roadmap. The gap between 24nm and 1xnm is about a year.
This has many implications. Not the least is that bit growth due to technology transitions will be zero in this stretch. NAND world has become accustomed to 30 to 50%± bit growth on technology transitions alone, every year.
NAND is slowing down.
This stretch between the 2H 2011 and the 2H of 2012 appears to be shaping up as something new.
So what’s the competition delivering on the X3 front?
In 2009, 50% of SanDisk’s NAND production was X3. The competition weighed in at less than 5%.
This year, 2010, Gartner estimates (Q4 2009) the average across all the other players will be 10%, and that it will take at least until 2012 for the competition to reach 50% X3 bit share.
If X3 is so valuable then why is the competition so slow?
SanDisk’s explanation is that X3 is not easy. X3 chips have specialized requirements, which SanDisk has met with all bit line architecture (ABL). Flash management is even more critical. SanDisk’s solution is adaptive flash management (AFM).
I would add two more reasons. With today’s tight supply, the competition doesn’t need to fight the X3 battle. They can already sell all the MLC they can produce.
Sterne Agee’s recent note:
“07:27 SNDK SanDisk: Samsung cutting back 3-bit output, AAPL MLC demand picking up, positive for SNDK – Sterne Agee (42.07 )
Sterne Agee’s checks in the NAND supply indicate NAND Supply continues to be constrained and inventory at normal levels. Firm believes Samsung is potentially cutting back on its 3-bit NAND output for 3Q10 as it caters to strong AAPL high density MLC demand. AAPL demand for 16-32Gb MLC picking up substantially as those are the key NAND components for the ramping builds on iPhone4 and iPad. Firm believes the mix shift at Samsung back to MLC plays well for Sandisk, as SNDK is the key player at 3-bit per cell.”
And then there’s IP. According to some, SanDisk owns critical IP for X3. Those like Micron (IMFT) who haven’t licensed with SanDisk might have to walk through a potential IP mine field for X3.
Of course, no one’s going to say that, better to attribute retreat to reliability issues, which may also be true- for those who don’t have what it takes for X3.
“Last August , IMFT announced a new three-bit-per-cell, NAND flash memory technology using its 34nm lithography process. the advancement represented an 11% reduction in NAND flash size. however, because of reliability issues, IMFT chose to discontinue production of a three-bit MLC NAND flash product, Kilbuck [director of NAND marketing at Micron] said.”